This invention relates to a thyristor drive system.
The conventional gate turn off thyristor (abbreviated as GTO) with a single gate structure has a problem of slow switching speed. This arises from the facts that the turn-on time is long, the power loss during the turn-off period is large due to large tail current initial value, tail time and turn-off time is long.
FIG. 1 illustrates a circuit arrangement for driving the single structure GTO. The gate electrode of GTO element 201 is coupled with the P base layer. The gate electrode is connected to the on-gate power source and the off-gate power source respectively through related switches. Reference numerals 202 and 203 designate a load and a main power source.
FIGS. 2A to 2C illustrate waveforms useful in explaining the operation of GTO element 201 shown in FIG. 1.
The operation of GTO element 201 will be described referring to those figures. At time t1, the switching element of the on-gate circuit is closed. Gate current IG flows from the on-gate power supply in the direction of arrow in FIG. 1. GTO element turns on. Before time t2, the switching element of the on-gate circuit is opened, and at time t2 the switching element of the off-gate circuit is closed. The current flows from the off-gate power source in the direction opposite to that of the gate current IG. Under this condition, no draw-out of current is performed.
A time duration t2 to t3 till the phenomenon of anode current I.sub.A commences is a storage time. During this storage time, the conduction region in GTO element 201 gradually narrows.
From time t3 anode current I.sub.A starts to decrease, while anode voltage starts to increase. Anode current I.sub.A abruptly decreases till time t4. The time duration t3 to t4 is a fall time, and the time duration t2 to t4 is a turn-off time.
A value of the anode current at time t4 is a tail current initial value. The current flowing from time t4 to time t5 is a tail current. The time duration from time t4 to t5 is a tail time and time, duration t2 to t5 is called a turn-off period. The tail current is caused by discharging residual charges from the N base layer. The power loss P (=V.sub.A .times.I.sub.A) during the period from t1 to t5 is varied as shown in FIG. 2C.
As seen from FIG. 2C, a large power loss occurs during period from t3 to t5. When carefully observing this period, it can easily be understood that the long fall period t3 to t4 increases the power loss, and the large tail current initial value increases the power loss during the tail period.
A measure, which has been taken for decreasing the power loss at the turn-off period, is to reduce the lifetime of carriers in the GTO element by the electron radiation or heavy metal doping process. This measure, however, has problems to increase the turn-on loss and to increase the forward voltage drop.
The gate turn-off thyristor of the double gate structure, to which this invention is directed, is disclosed in KOKAI No. 60-247969 invented by Kawamura, et al., and filed May 23, 1984 by Touyou Denki Seizou Co., Ltd. This Gazette discloses the double gate SI thyristor of N buffer structure. Another KOKAI No. 59-52876 filed by West Germany, discloses the method of driving the double gate thyristor with current sources between the P base and N emitter. Neither of the above Gazettes discloses techniques to solve the above discussed problems.